<mods:mods version="3.0" xsi:schemaLocation="http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-0.xsd" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:mods="http://www.loc.gov/mods/v3"><mods:titleInfo><mods:title>Stitching IC Images</mods:title></mods:titleInfo><mods:name type="personal"><mods:namePart type="given">Robert</mods:namePart><mods:namePart type="family">Piché</mods:namePart><mods:role><mods:roleTerm type="text">author</mods:roleTerm></mods:role></mods:name><mods:name type="personal"><mods:namePart type="given">Edward</mods:namePart><mods:namePart type="family">Keyes</mods:namePart><mods:role><mods:roleTerm type="text">author</mods:roleTerm></mods:role></mods:name><mods:abstract>Image stitching software is used in many areas such as photogrammetry, biomedical imaging, and even amateur digital photography. However, these algorithms require relatively large image overlap, and for this reason they cannot be used to stitch the integrated circuit (IC) images, whose overlap is typically less than 60 pixels for a 4096 by 4096 pixel image.

In this paper, we begin by using algorithmic graph theory to study optimal patterns for adding IC images one at a time to a grid. In the remaining sections we study ways of stitching all the images simultaneously using different optimisation approaches: least squares methods, simulated annealing, and nonlinear programming.</mods:abstract><mods:classification authority="lcc">None/Other</mods:classification><mods:classification authority="lcc">Information and communication technology</mods:classification><mods:originInfo><mods:dateIssued encoding="iso8061">2002</mods:dateIssued></mods:originInfo><mods:genre>Study Group Report</mods:genre></mods:mods>